Great Lakes Semiconductor (GLS) has announced the inaugural project under its Great American ChipForge™ platform, launched via the company’s Innovation Funnel™ initiative. The development integrates multiple GLS design centers, modular wafer fabrication lines, and its FINPAT™ packaging and test architecture to deliver intelligent, AI-enabled multi-sensor solutions for commercial vehicle platforms. The effort demonstrates a distributed, end-to-end manufacturing model designed to accelerate prototype turnaround and lower production barriers for specialized semiconductor applications.
The collaborative project brings together a multi-company ecosystem covering design, tool manufacturing, materials, and packaging. GLS is partnering with Japan’s Neitas and Daikin on modular fabrication equipment, while Altascient contributes predictive-intelligence-based planning. On the device front, FMC supplies low-power ferroelectric semiconductor memory, while BlueDot Ventures provides low-energy sensing devices derived from platforms already operating across commercial automotive fleets. Advanced Printed Electronic Solutions (APES) joins through the FINPAT™ framework, developing an additively manufactured package substrate that enables direct heterogeneous integration of GLS power management and RISC-V processors alongside FMC memory and BlueDot sensors.
At the center of this initiative is the ChipForge™ fabrication model, an alternative to high-overhead mega-fabs. Built around configurable production lines, the platform supports multiple process technologies, device architectures, and substrate materials without requiring the wholesale rebuilding of conventional cleanroom bays. Dr. Richard Thurston, Chairman and Chief Executive Officer of GLS and former General Counsel at TSMC, stated that aligning technology blueprints from early design concepts to production scaling enables design teams to convert concepts rapidly into qualified, packaged prototypes. This flexible fabrication flow allows process recipes validated within ChipForge™ to be transferred cleanly to high-volume strategic foundry partners as production scales.
The technical integration demonstrates how heterogeneous packaging solves edge computing bottlenecks in vehicle platforms. At the APES Fishkill design facility in New York, engineers are utilizing additive manufacturing techniques to embed energy-harvesting structures and supercapacitors directly into reusable power module substrates. By co-packaging FMC ferroelectric memory chiplets with a GLS-optimized RISC-V core running an energy-efficient machine learning classifier, the sensor module processes edge inference workloads locally. Because the ferroelectric memory retains learned model parameters with minimal power dissipation while the primary processor enters sleep states, the multi-chip architecture significantly cuts duty-cycle power consumption.
This milestone highlights a shift toward distributed semiconductor manufacturing and agile packaging. By coupling modular front-end wafer fabrication with additive advanced packaging, GLS and its partners provide a faster, capital-efficient pathway to bring bespoke automotive silicon from laboratory specifications into commercial deployment.
