Socionext is ramping up its use of agentic artificial intelligence in the physical design flow of large system-on-chip (SoC) designs using advanced process technologies. With the introduction of AI agents in front-end design and verification flows, the company is now incorporating such smart tools into its entire design flow to increase productivity and ensure good design quality.
Addressing Physical Design Challenges
With semiconductor devices becoming more complicated (particularly for the sub-5nm nodes), physical design has become one of the most challenging steps in designing chips. Designers need to deal with complicated layout limitations, strict power delivery specifications, and timing specifications. In order to address these challenges, Socionext is connecting the AI agents with the current electronic design automation (EDA) software as well as the current internal design methods.
As part of this initiative, Socionext is working with Cadence to physically design a large 3nm SoC. In doing so, the company will utilize the Cadence InnoStack AI Super Agent.
Technical Integration and Knowledge Capture
This solution leverages multiple important AI capabilities that can provide access to accumulated knowledge from engineers:
- Retrieval Augmented Generation (RAG): Links AI tools to custom documentation and design database for provision of contextual technical advice.
- Support for Model Context Protocol (MCP): Facilitates communication and information transfer between different design engines, custom scripts and AI systems.
- AI Skills: Configures general AI models to be able to perform certain engineering tasks using historical projects data.
Applications currently in use and in progress are the following important steps in layout and sign-off phases:
- Floorplanning: Automated placing of chip macros and early routing to achieve optimized silicon area and power distribution.
- Custom Timing Analysis Checks: Performing certain automated checks in order to identify possible timing failures during the layout phase.
- Automated Design Reviews: Checking layout files according to the company’s best practices.
Expected Productivity Gains
Through the incorporation of institutional knowledge in automated AI processes, Socionext aims at attaining up to five times productivity in their development processes. In place of taking over the roles of humans, the agents will undertake the mundane analysis and setting up of processes, leaving the engineers with more time for architecture and optimization.
Apart from the initial time saved, the company is able to ensure that the engineering knowledge remains institutionalized in the organization through the automation of the techniques used in the design process.
Building an End-to-End AI Workflow
In future, Socionext plans to directly connect its front-end AI technologies with its physical design tools so that the entire design process right from specification to sign-off is integrated with AI technologies. It also plans to create more AI agents and technical assistants to assist in sharing of knowledge and task automation in all design divisions.
This approach by Socionext comes against a trend prevailing in the semiconductor industry worldwide where chip designers are trying to go beyond single-task automation and developing knowledge-based AI environments.
