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Madhya Pradesh Semiconductor Summit 2026 Convenes in Indore to Drive Packaging and Fabless Investments

Madhya Pradesh Semiconductor Summit 2026 Convenes in Indore to Drive Packaging and Fabless Investments

The Madhya Pradesh government will host the two-day Madhya Pradesh Semiconductor Summit 2026 at the Brilliant Convention Centre in Indore on October 23 and 24, focusing on attracting capital investments and building an integrated microelectronics ecosystem. The event brings together domestic and multinational semiconductor enterprises, fabless chip design houses, institutional investors, academic leadership, and hardware startups. Chief Minister Dr. Mohan Yadav will inaugurate the summit, setting out the state’s strategic roadmap to capture downstream segments of the global semiconductor value chain.

The summit program features eight panel discussions, five closed-door roundtable sessions, and two keynote addresses, accompanied by an industrial technology exhibition hosting more than 50 companies across chip design, packaging, automated test equipment, specialty materials, and electronic manufacturing services (EMS). Day one sessions prioritize positioning the state as an outsourced semiconductor assembly and test (OSAT) destination, alongside policy roundtables on scaling the domestic fabless ecosystem, front-end manufacturing feasibility, and supply-chain localization. Technical sessions will also address artificial intelligence computing infrastructure, intellectual property protection, and university-industry research partnerships.

On day two, discussions turn toward advanced silicon architectures, design service commercialization, photonics, quantum technologies, and micro, small, and medium enterprise (MSME) integration. The summit will conclude by recognizing finalists from the Madhya Pradesh Semiconductor Startup Competition, an initiative designed to seed domestic intellectual property in semiconductor device design.

The commercial backdrop to the summit is underpinned by the Madhya Pradesh Semiconductor Policy 2025, which offers a 25 percent capital expenditure subsidy and subsidized industrial electricity at ₹2 per unit for up to 10 years. These fiscal incentives aim to lower initial operational expenditures for cleanrooms and automated packaging lines, which face heavy baseline utility and tooling overheads.

The state’s industrial pipeline was reinforced by an earlier memorandum of understanding with Paras Semiconductors to establish an advanced OSAT facility on the Ujjain–Indore corridor, representing a proposed investment of ₹6,200 crore. The planned unit focuses on high-density packaging, wafer bumping, flip-chip assembly, and testing services to supply high-reliability electronics across automotive, telecommunications, and industrial markets.

As India accelerates its broader Semicon India initiative, state-level policy execution has become central to distributing high-tech manufacturing beyond traditional industrial corridors. By combining targeted fiscal subsidies, predictable long-term power tariffs, and specialized industrial land allocations, Madhya Pradesh is positioning the Indore–Ujjain manufacturing belt to support downstream semiconductor packaging, testing, and fabless innovation across the domestic electronics supply chain.

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