Synopsys, Inc., the leader in silicon to systems design solutions and Singapore’s Agency for Science, Technology and Research (A*STAR), have signed a Memorandum of Understanding (MoU) to advance semiconductor packaging and simulation technologies. The collaboration focuses on accelerating innovation for advanced packaging and chiplet-based architectures — the key enablers for artificial intelligence (AI), high-performance computing (HPC), and next-generation electronic systems.
As semiconductor packages become more complex, companies need to identify design, reliability, and performance issues earlier in the development process. This collaboration will support the use of digital modelling and analysis tools to evaluate how a package is likely to perform before physical prototyping, helping companies develop more reliable and manufacturable advanced packaging solutions while saving time and cost.
The collaboration will take place through the A*STAR IME–Ansys Joint Innovation Consortium for Semiconductor Excellence (JICSE), involving A*STAR’s Institute of Microelectronics (A*STAR IME) and Ansys, now part of Synopsys. JICSE will serve as a platform for companies and researchers to undertake collaborative R&D and address emerging challenges in advanced System-in-Package (SiP) technologies.
Terence Gan, Executive Director at A*STAR IME, said, “Advanced packaging is fast becoming a critical differentiator in global semiconductor innovation, particularly as systems grow more complex and AI-driven. Through this collaboration with Synopsys, A*STAR IME is combining our R&D expertise with Synopsys’ line of Ansys simulation technologies to co-develop next-generation semiconductor packaging and simulation technologies. This enables companies to innovate with greater speed and confidence, and reinforces Singapore’s position as a leading hub for semiconductor innovation.”
Sukhwan Moon, Vice President APAC, Sales at Synopsys, said, “The future of semiconductor innovation is going to be increasingly defined by how effectively complex systems are designed and integrated. Through this collaboration with A*STAR IME and the launch of JICSE, Synopsys is committed to empowering an industry-wide shift toward simulation-led, system-driven design. This collaboration aims to back local companies in Singapore for tackling key challenges in reliability, performance, and scalability – while also fast-tracking the time-to-market for next-generation AI and HPC technologies.”
The initial phase of JICSE will focus on mechanical design, modelling, and analysis, addressing challenges such as package and wafer warpage, thermo-mechanical stress, solder joint reliability, and moisture-induced failures in increasingly complex multi-chiplet architectures. JISCE will also explore research projects with academic institutions, as well as offer technical training programmes and seminars to build capabilities in the industry in simulation-led design.
A*STAR IME will lead consortium-based R&D activities, drawing on its advanced packaging capabilities, industry-facing research platforms and applied research experience.
Synopsys will support the adoption of simulation-led design approaches by providing trial licences to its Ansys simulation software to A*STAR IME and up to ten consortium member companies.
