South Korean pure-play foundry DB HiTek has achieved a crucial milestone in wide-bandgap semiconductors by completing reliability qualification for its 1,200 V silicon carbide (SiC) MOSFET process on 8-inch (200 mm) wafers. The breakthrough establishes a dedicated manufacturing platform aimed at meeting escalating efficiency demands across electric mobility, industrial drive systems, and renewable energy infrastructure. The foundry has formally scheduled commercial volume production for 2027.
Navigating the 8-Inch SiC Migration
Silicon carbide has established itself as the baseline substrate for high-voltage power conversion, delivering higher thermal conductivity, faster switching speeds, and markedly lower conduction losses than traditional silicon (Si). However, widespread market adoption has long wrestled with production economics.
While 6-inch (150 mm) wafers remain the prevailing industry standard, high defect densities, substrate costs, and lower die yields per wafer keep unit prices elevated. Migrating to 200 mm wafers provides an estimated 1.8-fold increase in usable surface area per substrate. This shift delivers significant economies of scale and lowers per-die manufacturing costs. By mastering the 200 mm thermal budget and crystallographic challenges, DB HiTek positions itself among the front-runners executing the transition to larger wafer formats.
Process Architecture and Electrical Metrics
Through process optimization, DB HiTek has implemented an end-to-end 1,200 V foundry flow covering epitaxy-level design support, front-end manufacturing, characterization, and comprehensive device-level stress screening.
Central to the platform’s adoption are the Process Design Kits (PDKs) for its first- and second-generation architectures:
Second-Generation Performance: Reaches a specific on-resistance (Rsp) of ≤2.5 mΩ⋅cm2 alongside a threshold voltage (Vth) of ≥3 V operating at an on-state gate bias (Vgs(on)) of 18 V. These metrics balance low conduction loss with gate-noise immunity against spurious turn-on events.
Third-Generation Roadmap: Slated for release this November, the Gen-3 platform lowers target specific on-resistance to ≤2.3 mΩ⋅cm² under the same 18 V gate drive. Crucially, it targets a short-circuit withstand time (SCWT) of ≥2.5 μs within the short-circuit safe operating area (SCSOA—a vital safety margin for EV traction inverters during transient fault conditions.
By supplying mature PDK models directly to fabless design teams, DB HiTek expects customers to shorten prototyping cycles and cut total time-to-market by more than 12 months.
Commercial Rollout Strategy
The foundry plans to finalize process integration and open initial capacity to longstanding foundry partners in the third quarter of this year. Full commercial access for the broader global customer base will open in the second quarter of 2027.
As automakers standardize on 800V bus architectures and grid-tied energy storage demands higher breakdown ratings, dependable 1,200V switching devices are becoming critical system components. DB HiTek’s readiness on 200 mm wafers directly tackles capacity bottlenecks, bringing higher yield throughput to competitive automotive and industrial power electronics supply chains.
